Layer 1 — Compute silicon & packaging

Position in the die→grid hierarchy: inside the server.

The silicon at the heart of the build: GPUs and custom accelerators, the CPUs beside them, the foundries and advanced packaging that put them together, and the substrates, wafers, equipment and materials one step upstream. Almost every dollar of an AI data center is ultimately spent to keep this layer busy.

Parts in this layer

• 1.01 Merchant GPUs / accelerators · 3 companies
  GPUs and other accelerator chips designed by merchant vendors and sold to any buyer, rather than designed in-house by a single hyperscaler; the workhorse silicon for AI training and inference.
• 1.02 Hyperscaler custom ASICs (XPUs) · 9 companies
  AI accelerator chips (often called XPUs) designed in-house by a hyperscaler for its own fleet, typically co-developed with an outside ASIC design partner and fabbed by a merchant foundry.
• 1.03 ASIC design services, IP & EDA · 13 companies
  Outside firms and licensors — design-services houses, IP blocks, and EDA software — that hyperscalers and accelerator startups use to turn a chip specification into a manufacturable design.
• 1.04 Startup accelerators (non-GPU architectures) · 11 companies
  Non-GPU accelerator architectures from mostly-private startups, built as an alternative to merchant GPUs for specific AI training or inference workloads.
• 1.05 Server CPUs · 8 companies
  The host CPU in an AI server — from AMD, Intel, or Arm-based designs including Nvidia's own and hyperscaler in-house parts — that orchestrates the GPUs and handles work the accelerators don't do.
• 1.06 NICs / SuperNICs · 5 companies
  Network interface cards, including Nvidia's higher-bandwidth "SuperNIC" variants, that connect a server's CPU and GPUs to the cluster network.
• 1.07 DPUs · 5 companies
  Data Processing Units that offload networking, storage, and security functions from the host CPU onto a dedicated, programmable chip.
• 1.08 FPGAs (inference, networking, test) · 4 companies
  Field-programmable chips used in AI clusters for inference offload, networking functions, and hardware test and bring-up, rather than as the primary training accelerator.
• 1.09 Leading-edge foundry · 3 companies
  The advanced-node semiconductor fabs that manufacture the compute dies for essentially every AI accelerator on the market.
• 1.10 Silicon wafers · 5 companies
  The raw silicon wafers that foundries process into finished chips, produced by a small group of specialty wafer manufacturers.
• 1.11 2.5D/3D advanced packaging (CoWoS-S/L/R, SoIC, EMIB/Foveros, I-Cube) · 7 companies
  The 2.5D/3D processes that combine a compute die, HBM memory stacks, and a substrate into one finished package — the step that turns silicon into a shippable AI accelerator.
• 1.12 Packaging & bonding equipment · 16 companies
  The bonding, dicing, inspection, and molding equipment used to physically assemble and verify advanced chip packages.
• 1.13 ABF / high-layer package substrates · 10 companies
  The high-layer-count ABF substrates that an advanced chip package is mounted on, sitting between the interposer and the server board.
• 1.14 Substrate materials · 5 companies
  The films, resins, glass cloth, and other specialty chemicals that go into building an ABF package substrate.
• 1.15 Glass-core substrates (emerging) · 6 companies
  Substrates that use a glass core instead of an organic laminate, an emerging alternative aimed at the largest, most demanding AI packages.
• 1.16 Interposers, silicon bridges, RDL · 4 companies
  The silicon interposers, bridges, and redistribution layers that route signals between a compute die, HBM stacks, and the substrate inside an advanced package.
• 1.17 Chip-level thermal: lids, heat spreaders, TIMs · 9 companies
  The metal lids, heat spreaders, and thermal interface materials applied directly at the die level to move heat off an accelerator package before it ever reaches a cold plate or heat sink.
• 1.18 Semiconductor test & burn-in · 9 companies
  The automated test equipment, probe cards, sockets, and burn-in systems used to verify a chip works before and after it's packaged.
• 1.19 Fab equipment (upstream) · 8 companies
  The lithography, deposition, etch, and inspection tools that fabs use to manufacture chips — upstream capital equipment rather than a part that ships in any finished accelerator.
• 1.20 Fab materials, masks, gases (upstream) · 21 companies
  The photoresist, masks, process chemicals, sputtering targets, and specialty gases consumed in volume during chip fabrication.

Public plays in this layer

Listed companies with the most part placements in layer 1. Placement count is breadth, not revenue exposure.