Who makes dpus for AI data centers
Data Processing Units that offload networking, storage, and security functions from the host CPU onto a dedicated, programmable chip.
A DPU takes infrastructure work — packet processing, storage virtualization, security functions — off the server CPU (Server CPUs) so those CPU cycles can go to orchestrating GPUs and other workload instead. It typically shares the board with the NIC or SuperNIC (NICs / SuperNICs) and, in some designs, is combined with it on a single card. Adoption is not universal: it's a design choice tied to a given server architecture and hyperscaler infrastructure stack rather than a component every AI server needs. For investors, DPU exposure is concentrated in a small number of vendors, including at least one hyperscaler that has built its own in-house rather than buying merchant silicon, which caps the addressable market for the merchant suppliers at whichever fleets choose to buy rather than build. The category is worth tracking less for standalone unit growth and more as a signal of which server architectures a given hyperscaler or OEM has standardized on, since DPU attach is usually decided at the platform level rather than per order.
AI delta: Offloading networking, storage, and security work from the host CPU matters more as GPU-dense AI servers push CPU cycles toward scarcity, since every cycle not spent on infrastructure work is a cycle available for orchestrating accelerators.
Companies on this part (5)
| Company | Role | Ownership | Ticker | Price | 1d | Confidence | Note |
|---|---|---|---|---|---|---|---|
| AMD | manufacturer | public | AMD | 477 USD | -1.7% | inferred | Pensando |
| Intel | manufacturer | public | INTC | 92.09 USD | +2.4% | inferred | IPU |
| Marvell | manufacturer | public | MRVL | 241 USD | -5.6% | inferred | OCTEON |
| Microsoft | in house | public | MSFT | 505 USD | +1.8% | inferred | in-house |
| Nvidia | manufacturer | public | NVDA | 228 USD | +3.8% | inferred | BlueField |
Who competes here
The same table read the other way: every company above competes for dpus sockets. Confidence tags matter — an inferred placement is a lead, not a confirmed rivalry.
Nearby parts
- Previous in layer: NICs / SuperNICs
- Next in layer: FPGAs
- Layer: Layer 1 — Compute silicon & packaging
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- Exemption that shields US$143 billion of US server imports is now on the table — DigiTimes, 2026-08-28A Section 232 duty on advanced logic chips was implemented, but an exemption was issued for imported computer processing units used in US data centers.
- Marvell revenue climbs 37% to a record US$2.74 billion on data center demand — DigiTimes, 2026-08-28Marvell's total revenue reached a record $2.74 billion in Q2 FY2027, driven primarily by its data center segment which contributed 79% of the total.
- NVMe 2.4 Update Adds Post-Quantum Security, Power Controls — EE Times, 2026-08-26The NVMe 2.4 update enhances security features, power management capabilities, and virtualization support for various cloud and AI workloads.
- Hot Chips 2026: Arm details AGI server CPU with two 70-core N3P chiplets — touts 2 TB/s UCIe fabric link and 12-channel memory controller — Tom's Hardware, 2026-08-26Arm revealed details about its AGI processors, which include up to 136 cores and utilize a 2 TB/s UCIe fabric link alongside a 12-channel memory controller.
Sources: placements without a source URL come from the taxonomy seed and are tagged accordingly. How this data is built.· Markdown · JSON