What AMD makes for data centers
public · HQ Santa Clara, United States · amd.com · also known as: Xilinx
AMD designs EPYC server CPUs and Instinct MI-series GPU accelerators, including the rack-scale Helios platform, plus Pensando-brand DPUs and SmartNICs and, from its Xilinx acquisition, FPGAs used in networking and acceleration. It is a founding participant in the UALink consortium for scale-up accelerator interconnect.
Listing
US exchanges (NYSE/Nasdaq): AMD· 517 USD +2.19% · mkt cap 843.6B USD
Snapshot 2026-10-25T10:41:17Z — nightly, not real-time.· Chart on TradingView ↗
Exposure
7 parts across 3 layers
AMD reports Data Center as a named segment: "For the full year 2025, Data Center segment revenue was a record $16.6 billion, up 32% year-over-year" (Q4/FY2025 results press release, ir.amd.com).
Parts, by layer
Layer 1 — Compute silicon & packaging
| Part | Role | Confidence | Competitors | Note |
|---|---|---|---|---|
| Merchant GPUs / accelerators | manufacturer | disclosed | Intel, Nvidia | Instinct MI350/MI400 |
| Server CPUs | manufacturer | disclosed | Arm, Intel, Nvidia, Ampere | EPYC |
| NICs / SuperNICs | manufacturer | inferred | Broadcom, Intel, Marvell, Nvidia | Pensando/Pollara |
| DPUs | manufacturer | inferred | Microsoft, Intel, Marvell, Nvidia | Pensando |
| FPGAs | manufacturer | inferred | Lattice, Achronix, Altera |
Layer 3 — Networking & interconnect
| Part | Role | Confidence | Competitors | Note |
|---|---|---|---|---|
| Scale-up fabric | manufacturer | inferred | Alphabet (Google), Astera Labs, Broadcom, Nvidia, UALink consortium | Infinity Fabric |
Layer 4 — Servers, racks & integration
| Part | Role | Confidence | Competitors | Note |
|---|---|---|---|---|
| Rack-scale systems | designer | inferred | Quanta Computer, ASRock Rack, ASUS, Cisco, Compal, Dell | AMD design arm; manufacturing → Sanmina SANM; 2025 |
Where AMD sits in the stack
AMD's placements in this catalog cover 7 parts, from layer 1 (compute silicon & packaging) to layer 4 (servers, racks & integration). None of them currently carries a sourced supply constraint tag. Across these parts it overlaps with other companies most often on the lines below.
What these parts are
- Merchant GPUs / accelerators — GPUs and other accelerator chips designed by merchant vendors and sold to any buyer, rather than designed in-house by a single hyperscaler.
- Server CPUs — The host CPU in an AI server — from AMD, Intel, or Arm-based designs including Nvidia's own and hyperscaler in-house parts — that orchestrates the GPUs and handles work the accelerators don't do.
- NICs / SuperNICs — Network interface cards, including Nvidia's higher-bandwidth "SuperNIC" variants, that connect a server's CPU and GPUs to the cluster network.
- DPUs — Data Processing Units that offload networking, storage, and security functions from the host CPU onto a dedicated, programmable chip.
- FPGAs — Field-programmable chips used in AI clusters for inference offload, networking functions, and hardware test and bring-up, rather than as the primary training accelerator.
- and 2 more in the table above.
Closest peers in this catalog
| Company | Shared parts | Including | |
|---|---|---|---|
| Nvidia | 6 | Merchant GPUs / accelerators, Server CPUs, NICs / SuperNICs and 3 more | Compare → |
| Intel | 4 | Merchant GPUs / accelerators, Server CPUs, NICs / SuperNICs and 1 more | Compare → |
| Broadcom | 2 | NICs / SuperNICs, Scale-up fabric | |
| Marvell | 2 | NICs / SuperNICs, DPUs | |
| Alphabet | 1 | Scale-up fabric | |
| Arm | 1 | Server CPUs |
Seen in real machines
AMD is named in 8 of the rack teardowns and supercomputer breakdowns on this site. Each line below is a piece of that machine.
- AMD Helios (MI455X) · rack teardown
- Rack architecture and reference design (built on Meta's Open Rack Wide standard, submitted to OCP)
- 18x compute trays (4x MI455X GPUs + 1x EPYC "Venice" CPU each)
- MI455X GPU die (CDNA 5; compute chiplets on TSMC N2, fabric/cache and I/O chiplets on TSMC N3P)
- and 4 more on the AMD Helios (MI455X) page
- El Capitan · supercomputer
- Compute blade and node (HPE Cray EX255a; a blade holds two nodes, a node holds 4 MI300A APUs) (MI300A APUs on the blade)
- AMD Instinct MI300A APU (CPU, GPU, cache and HBM3 in one package; 24 Zen 4 cores, 228 CDNA 3 compute units, 128 GB HBM3)
- Rabbit near-node storage (4U module: 16 SSDs plus one AMD EPYC storage processor, two per cabinet, each wired to 16 compute nodes) (EPYC storage processor in each Rabbit)
- Frontier · supercomputer
- MI250X accelerator (two GCDs per module, fabricated on TSMC 6nm; 4 modules per node)
- Two-die package with 2.5D Elevated Fanout Bridge (EFB) interconnect and eight HBM2E stacks (announced the EFB packaging technology with the MI200 series)
- Host CPU (one 64-core AMD Optimized 3rd Gen EPYC per node, coherent with the GPUs over Infinity Fabric)
- JUPITER · supercomputer
- System memory (Booster 4x 120 GB LPDDR5X per node; Cluster 768 GB DDR5 per Turin node, 512 GB DDR5 per Rhea1 node) (Turin nodes use DDR5 through the EPYC memory controllers)
- Cluster module CPUs, AMD EPYC Turin 9655 (582 dual-socket nodes, 96 cores per CPU)
- Alps · supercomputer
- CPU-only partition (1,024 nodes of two AMD EPYC 7742 Rome CPUs, 64 cores each; installed from October 2020)
- AMD Instinct MI300A partition (128 nodes, 4 APUs per node, 512 in total; HPE Cray EX255A blades) (MI300A APU, 24 Zen 4 cores plus CDNA 3 GPU on one package)
- NVIDIA A100 partition (144 nodes, one AMD EPYC host and 4 A100 GPUs per node, 576 GPUs) and AMD Instinct MI250X partition (24 nodes, 4 MI250X per node, 96 GPUs; HPE Cray EX235A blades) (MI250X GPUs and EPYC host CPUs (EPYC 7A53 Trento in the MI250X nodes))
- LUMI · supercomputer
- AMD Instinct MI250X accelerator (two GCDs per module, 110 compute units each, 64 GB HBM2e per GCD; TSMC 6nm) (designer; chosen for LUMI on performance per watt, per the LUMI director)
- LUMI-G host CPU (AMD EPYC 7A53 "Trento", 64 Zen 3 cores, wired to the GPUs by Infinity Fabric)
- LUMI-C CPU partition (2,048 nodes, each with two 64-core AMD EPYC 7763 "Milan"; 256 GiB to 1 TiB per node)
- and 1 more on the LUMI page
- Leonardo · supercomputer
- Frontend and service nodes (32 BullSequana X430-E6 and X450-E6 frontend servers on Xeon Platinum 8358 with 16 Nvidia Quadro RTX 8000 visualisation GPU pairs; 11 management nodes on AMD EPYC 7H12) (EPYC Rome 7H12 (64 cores) in the 11 operational management nodes)
- Perlmutter · supercomputer
- GPU-node host CPU (one 64-core AMD EPYC 7763 "Milan" per node, PCIe 4.0 to the GPUs and NICs)
- CPU partition (3,072 nodes, four per compute blade, each with two 64-core AMD EPYC 7763 and 512 GB DDR4) (two EPYC 7763 "Milan" CPUs per node)
- Scratch storage servers (single-socket AMD EPYC 7502 in each E1000 server canister, with two Slingshot NICs per server) (EPYC 7502 "Rome" CPU in each Lustre OSS and MDS)
Disclosed customers
| Customer | % | Metric | Period | Filing |
|---|---|---|---|---|
| one customer | 11% | receivables | 2025-12-27 | 10-K |
From the blog
Questions about AMD
- What does AMD make for AI data centers?
- This catalog places AMD on 7 parts: Merchant GPUs / accelerators (manufacturer), Server CPUs (manufacturer), NICs / SuperNICs (manufacturer), DPUs (manufacturer), FPGAs (manufacturer), Scale-up fabric (manufacturer) and Rack-scale systems (designer).
- Is AMD publicly traded?
- Yes — AMD is listed on US exchanges (NYSE/Nasdaq) under AMD. Prices shown on this page are a nightly snapshot, not real-time, and nothing here is investment advice.
- Where is AMD based?
- Santa Clara, United States, per the company record in this catalog.
- Who else makes merchant GPUs / accelerators for AI data centers?
- Intel and Nvidia are also placed on Merchant GPUs / accelerators in this catalog.
- How well sourced are these placements?
- Every part→company placement carries a confidence tag. For AMD the mix is 2 disclosed and 5 inferred. "disclosed" means the company or a filing says so; "reported" comes from trade press or a reference-design list; "inferred" is a lead from the taxonomy with no citation yet. Treat reported and inferred as leads, not facts.
Answers are generated from this catalog's own rows — see sources & method.
Verification: enriched, last verified 2026-08-27. Sources: ir.amd.com.· Markdown · JSON