What Arm makes for data centers
public
Arm is a publicly listed company. It appears on 2 parts of the AI data center — ASIC design services, IP & EDA and Server CPUs — in the roles of service and manufacturer. Those parts sit in Layer 1 — Compute silicon & packaging. Its shares trade on US exchanges (NYSE/Nasdaq) as ARM.
Parts, by layer
Layer 1 — Compute silicon & packaging
| Part | Role | Confidence | Competitors | Note |
|---|---|---|---|---|
| ASIC design services, IP & EDA | service | inferred | Alchip, Broadcom, Cadence, Credo, Faraday, Global Unichip | CPU IP |
| Server CPUs | manufacturer | inferred | AMD, Intel, Nvidia, Ampere | as licensor |
Where Arm sits in the stack
Arm's placements in this catalog cover 2 parts, all in layer 1, compute silicon & packaging. None of them currently carries a sourced supply constraint tag. Across these parts it overlaps with other companies most often on the lines below.
What these parts are
- ASIC design services, IP & EDA — Outside firms and licensors — design-services houses, IP blocks, and EDA software — that hyperscalers and accelerator startups use to turn a chip specification into a manufacturable design.
- Server CPUs — The host CPU in an AI server — from AMD, Intel, or Arm-based designs including Nvidia's own and hyperscaler in-house parts — that orchestrates the GPUs and handles work the accelerators don't do.
Closest peers in this catalog
Seen in real machines
Arm is named in 5 of the rack teardowns and supercomputer breakdowns on this site. Each line below is a piece of that machine.
- JUPITER · supercomputer
- GH200 Grace Hopper Superchip (Hopper GPU plus 72-core Grace CPU joined by NVLink-C2C) (Neoverse V2 core design used in the Grace CPU)
- Cluster module CPUs, SiPearl Rhea1 (162 dual-socket nodes, 80 Arm Neoverse V1 cores and 64 GB HBM2e per CPU; first samples delivered to Bull 2026-09-22) (Neoverse V1 core design)
- Alps · supercomputer
- GH200 Grace Hopper Superchip (72-core Grace CPU plus Hopper GPU with 96 GB HBM3, joined by NVLink-C2C; 10,752 superchips) (Neoverse V2 core design used in the Grace CPU)
- Isambard-AI · supercomputer
- GH200 Grace Hopper Superchip (Hopper GPU plus 72-core Grace CPU joined by NVLink-C2C, 5,448 in the full system) (Neoverse V2 core design used in the Grace CPU)
- Venado · supercomputer
- GH200 Grace Hopper Superchip (Arm-based Grace CPU plus Hopper H100 GPU joined by NVLink-C2C; 2,560 superchips) (Neoverse V2 core design used in the Grace CPU)
- Grace CPU Superchip partition (920 CPU-only superchips, each two 72-core Grace CPUs, 144 Arm cores, linked by NVLink-C2C; up to 960 GB LPDDR5X per superchip) (Neoverse V2 core design in the Grace CPU, per NVIDIA's Grace CPU Superchip page)
- Fugaku · supercomputer
- Arm instruction set (Armv8.2-A with the SVE vector extension, co-specified by Fujitsu) (instruction-set architecture and SVE extension; Fujitsu was lead partner on the SVE specification)
Disclosed customers
| Customer | % | Metric | Period | Filing |
|---|---|---|---|---|
| largest customers (combined) | 42% | revenue | 2026-03-31 | 20-F |
From the blog
Questions about Arm
- What does Arm make for AI data centers?
- This catalog places Arm on 2 parts: ASIC design services, IP & EDA (service) and Server CPUs (manufacturer).
- Is Arm publicly traded?
- Yes — Arm is listed on US exchanges (NYSE/Nasdaq) under ARM. Prices shown on this page are a nightly snapshot, not real-time, and nothing here is investment advice.
- Who else makes ASIC design services, IP & EDA for AI data centers?
- Alchip, Broadcom, Cadence, Credo, Faraday and Global Unichip are also placed on ASIC design services, IP & EDA in this catalog.
- How well sourced are these placements?
- Every part→company placement carries a confidence tag. For Arm the mix is 2 inferred. "disclosed" means the company or a filing says so; "reported" comes from trade press or a reference-design list; "inferred" is a lead from the taxonomy with no citation yet. Treat reported and inferred as leads, not facts.
Answers are generated from this catalog's own rows — see sources & method.