Who makes interposers for AI data centers
The silicon interposers, bridges, and redistribution layers that route signals between a compute die, HBM stacks, and the substrate inside an advanced package.
Interposers and bridges are the wiring layer inside an advanced package: a piece of silicon (or a smaller bridge die) that sits between the compute die and HBM stacks above it and the substrate below (2.5D/3D advanced packaging, ABF / high-layer package substrates), routing the dense set of connections a multi-die AI accelerator package needs. Some of this capacity comes from the same foundries doing the most advanced logic manufacturing, and some from separate interposer-focused suppliers, which makes this sub-category's investor exposure partly overlap with, and partly separate from, foundry exposure itself. The category's importance to investors is proportional to how many discrete dies a given accelerator package combines — more chiplets and more HBM stacks per package means more interposer or bridge area needed per finished accelerator, independent of overall accelerator unit growth. It's a smaller, more technical sub-position than packaging or substrates broadly, but one where a design shift toward more disaggregated, multi-die accelerator architectures would increase demand per chip even if total chip volume held flat.
AI delta: More die per package and more instances of 2.5D/3D packaging per accelerator generation both require more interposer or bridge area, independent of overall unit growth.
Companies on this part (4)
| Company | Role | Ownership | Ticker | Price | 1d | Confidence | Note |
|---|---|---|---|---|---|---|---|
| Intel | manufacturer | public | INTC | 86.96 USD | +2.6% | inferred | EMIB |
| Samsung Electronics | manufacturer | public | 005930.KS | 215500 KRW | +0.2% | inferred | |
| TSMC | manufacturer | public | 2330.TW | 2385 TWD | -0.8% | inferred | CoWoS interposers, LSI bridges |
| UMC | manufacturer | public | 2303.TW | 126 TWD | -1.6% | inferred | interposer supply |
Who competes here
The same table read the other way: every company above competes for interposers, silicon bridges, RDL sockets. Confidence tags matter — an inferred placement is a lead, not a confirmed rivalry.
Seen in real machines
interposers, silicon bridges, RDL is named in 1 of the rack teardowns and supercomputer breakdowns on this site. Each line below is a piece of that machine. The companies shown are the ones named on that line, not necessarily the maker of this part.
Nearby parts
- Previous in layer: Glass-core substrates
- Next in layer: Chip-level thermal: lids, heat spreaders, TIMs
- Layer: Layer 1 — Compute silicon & packaging
Latest feed
- Nvidia unveils OOI CPO prototype for post-2028 AI needs — DigiTimes, 2026-10-25
- AI chip scaling shifts into 3D, with performance per watt the new benchmark, says former TSMC VP — DigiTimes, 2026-10-21The semiconductor industry's focus for AI computing is shifting towards 3D architectures, making power efficiency the primary measure of improvement.
- Contrel, FSE combine laser and plasma processes for advanced packaging — DigiTimes, 2026-10-21Contrel and FSE presented combined laser and plasma process technologies at TPCA Show 2026, focusing on applications in advanced packaging and high-end substrate manufacturing.
- AUO selects glass substrate specs for semiconductor processes, not size rivalry — DigiTimes, 2026-10-20AUO is customizing its glass core substrate specifications for semiconductor process needs instead of focusing on panel size competition, aiming to supply OSAT leaders like ASE and Powertech.
- AI substrate bottleneck shifts from design to manufacturing — DigiTimes, 2026-10-20The increasing size, layer count, and power demands of accelerator substrates are causing the primary industry bottleneck to shift from design limitations to physical manufacturing capacity.
- Samsung Electro-Mechanics' US$5.1 billion expansion faces equipment supply constraints — DigiTimes, 2026-10-17Samsung Electro-Mechanics' planned expansion for AI server substrate production is reportedly facing equipment supply constraints and longer delivery times from machinery manufacturers.
- Analysis: TSMC-GF deal moves mature nodes into AI packaging: What it means for China — DigiTimes, 2026-10-16The agreement between TSMC and GF suggests that advanced packaging techniques, such as those involving 2.5D/3D integration and interposers, are being applied to mature semiconductor nodes, which impacts the electronics supply chain.
- Analysis: GlobalFoundries' calculus behind US$2 billion entry into TSMC's CoWoS ecosystem — DigiTimes, 2026-10-15GlobalFoundries has signed a multi-year agreement with TSMC to provide silicon interposer capacity for its CoWoS advanced packaging ecosystem at its Malta facility.
- Beyond Lithography: 3D Scaling Puts New Demands on Materials — EE Times, 2026-10-14ASM International discusses the critical role of materials and process innovations required to support increasingly complex 3D semiconductor packaging and scaling.
- Analyzing Intel's EMIB and Foveros advanced packaging roadmaps — Tom's Hardware, 2026-10-14The report analyzes the current status and future trajectory of Intel's EMIB and Foveros advanced packaging technologies.
Questions about interposers, silicon bridges, RDL
- What is interposers, silicon bridges, RDL?
- The silicon interposers, bridges, and redistribution layers that route signals between a compute die, HBM stacks, and the substrate inside an advanced package.
- Which companies make interposers for AI data centers?
- This catalog lists 4 companies on Interposers, silicon bridges, RDL, 4 of them with listed equity: Intel, Samsung Electronics, TSMC, UMC.
- How does AI change demand for interposers, silicon bridges, RDL?
- More die per package and more instances of 2.5D/3D packaging per accelerator generation both require more interposer or bridge area, independent of overall unit growth.
- How reliable are these interposers, silicon bridges, RDL supplier placements?
- The 4 placements on this part break down as 4 inferred. "disclosed" means the company or a filing says so; "reported" comes from trade press or a reference-design list; "inferred" is a taxonomy lead with no citation yet.
Sources: placements without a source URL come from the taxonomy seed and are tagged accordingly. How this data is built.· Markdown · JSON