Who makes scale-out switch ASICs for AI data centers
The switch ASICs that route traffic between racks and pods, distinct from the scale-up fabric inside a single rack.
Scale-out switch ASICs sit between the rack-level scale-up fabric (3.01) and the switch systems and white-box ODMs (3.03) that build them into deployable hardware. They carry traffic between racks, pods, and clusters — the layer that turns individual GPU-dense racks into a single, larger training or inference domain. AI clusters push both the port count and per-port bandwidth of these ASICs higher as accelerator counts grow, since network bandwidth between racks has to keep pace with the compute inside them or become the bottleneck. An investor should watch supplier concentration at the ASIC level itself, since a small number of designs feed a much larger number of switch-system builders, and watch how Ethernet-based and InfiniBand-based approaches split share as hyperscalers weigh openness against performance.
AI delta: AI clusters need far more inter-rack bandwidth than general-purpose data centers, pushing scale-out switch ASICs toward higher port counts and per-port speeds sooner.
Companies on this part (5)
| Company | Role | Ownership | Ticker | Price | 1d | Confidence | Note |
|---|---|---|---|---|---|---|---|
| Broadcom | manufacturer | public | AVGO | 322 USD | -0.3% | disclosed | Tomahawk/Jericho · source |
| Cisco | manufacturer | public | CSCO | 107 USD | +1.4% | inferred | Silicon One |
| Marvell | manufacturer | public | MRVL | 229 USD | +3.7% | inferred | Teralynx |
| Nvidia | manufacturer | public | NVDA | 211 USD | -0.7% | disclosed | Spectrum (Ethernet) and Quantum (InfiniBand) · source |
| Huawei | manufacturer | private | inferred |
Who competes here
The same table read the other way: every company above competes for scale-out switch ASICs sockets. Confidence tags matter — an inferred placement is a lead, not a confirmed rivalry.
Seen in real machines
scale-out switch ASICs is named in 15 of the rack teardowns and supercomputer breakdowns on this site. Each line below is a piece of that machine. The companies shown are the ones named on that line, not necessarily the maker of this part.
- El Capitan · supercomputer
- Slingshot-11 fabric (HPE Rosetta switches, dragonfly topology, 64 ports at 200 Gb/s) — HPE
- Frontier · supercomputer
- Aurora · supercomputer
- JUPITER · supercomputer
- InfiniBand fabric (Quantum NDR switches, Dragonfly+ with 27 groups, about 50,000 links and 867 switches) — Nvidia
- Alps · supercomputer
- LUMI · supercomputer
- Leonardo · supercomputer
- InfiniBand fabric (QM8700 HDR switches, 823 in total, Dragonfly+ across 23 cells with an all-to-all link between every cell pair) — Nvidia
- Venado · supercomputer
- Perlmutter · supercomputer
- Eagle (Microsoft Azure) · supercomputer
- InfiniBand fabric (NVIDIA Quantum-2 NDR switching in a non-blocking fat-tree; 3.2 Tb/s per VM) — Nvidia
- Eos · supercomputer
- InfiniBand fabric (Quantum-2 NDR switches, 448 in a 3-tier, rail-optimized, non-blocking fat tree per NVIDIA's statement) — Nvidia
- Fugaku · supercomputer
- Tofu Interconnect D (on-die network controller and router, 6D mesh/torus, 6 network interfaces at 6.8 GB/s each, about 216,864 cables) — Fujitsu
- MareNostrum 5 · supercomputer
- InfiniBand NDR200 fabric (324 QM9790 switches in a three-layer fat tree; 3 GPP islands, 7 ACC islands, 1 storage island) — Nvidia
- Horizon · supercomputer
- InfiniBand fabric (NVIDIA XDR switches in two non-blocking fat trees joined by a third level; Quantum-X800) — Nvidia
- Doudna (NERSC-10) · supercomputer
- InfiniBand network (NVIDIA Quantum-X800, with quality-of-service for data streamed in over ESnet) — Nvidia
Nearby parts
- Previous in layer: Scale-up fabric
- Next in layer: Switch systems & white-box ODMs
- Layer: Layer 3 — Networking & interconnect
From the blog
- Part of the day: Scale-out switch ASICs 2026-09-05
Watch
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- [AI Infrastructure Insight] How AI infrastructure will be designed for the future — newsroom:sk-hynix, 2026-10-22Effective real-world AI application requires improvements across faster compute, wider memory bandwidth, higher-performance networking, better storage, and more stable power infrastructure.
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- AI chip competition shifts to data-center efficiency as memory, interconnect limits bite — DigiTimes, 2026-10-14The competition in AI chip development is pivoting toward data-center efficiency to overcome scaling limitations in high-bandwidth memory and interconnect speeds.
- Cisco expands AI networking with new chips, SONiC, cross-site deployment — DigiTimes, 2026-10-14Cisco is expanding its AI networking capabilities by deploying new switches powered by high-performance silicon and the SONiC operating system across various data center sites.
- Google data center strategic sourcing exec heads to OpenAI — Data Center Dynamics, 2026-10-13Google's strategic sourcing executive is joining OpenAI to focus on high-speed interconnects and rack power infrastructure.
- Microchip Technology updates its networking and storage products to better support AI and HPC workloads — Data Center Dynamics, 2026-10-13Microchip Technology has updated its networking and storage product portfolio to support the specific infrastructure requirements of AI and High-Performance Computing (HPC) workloads.
- Micas Networks Unveils 3 102.4T Open Ethernet Platforms for AI Factories — HPCwire, 2026-10-12Micas Networks has launched three 102.4T Open Ethernet platforms designed for high-scale AI factory interconnects.
Questions about scale-out switch ASICs
- What are scale-out switch ASICs?
- The switch ASICs that route traffic between racks and pods, distinct from the scale-up fabric inside a single rack.
- Which companies make scale-out switch ASICs for AI data centers?
- This catalog lists 5 companies on Scale-out switch ASICs, 4 of them with listed equity: Broadcom, Cisco, Marvell, Nvidia, Huawei.
- How does AI change demand for scale-out switch ASICs?
- AI clusters need far more inter-rack bandwidth than general-purpose data centers, pushing scale-out switch ASICs toward higher port counts and per-port speeds sooner.
- How reliable are these scale-out switch ASICs supplier placements?
- The 5 placements on this part break down as 2 disclosed, 3 inferred. "disclosed" means the company or a filing says so; "reported" comes from trade press or a reference-design list; "inferred" is a taxonomy lead with no citation yet.
Sources: placements without a source URL come from the taxonomy seed and are tagged accordingly. How this data is built.· Markdown · JSON