Who makes rack test for AI data centers

Chips are tested at the wafer and the package, boards are tested after assembly, and then the finished rack is tested again as one machine. That last step is what this part covers, and it is a different problem from the ones before it. A rack-level test cell has to supply megawatt-class power, take away the heat that power becomes, connect the network, and then run the whole cabinet at load long enough for thermal and power faults to show themselves. The reason it exists is that the failures worth catching here only appear at full assembly: a marginal power stage that holds at bench load and drops under a real workload, a cold plate that seats badly, a connector that walks under thermal cycling. Finding those at the integrator is cheap; finding them after a rack is installed in a hall costs a field visit and hall downtime. AI racks made this a constraint rather than a formality, because the power and cooling a test cell must provide scale with the rack, and a facility that could burn in air-cooled servers cannot necessarily burn in a dense liquid-cooled cabinet. What to look for is the equipment side — programmable loads, power analysers and instrumentation — separately from the floor space and utility capacity at the integrator, since the second is often the real limit on how many racks a week can ship.